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CY62136V MoBL(R)
2-Mbit (128K x 16) Static RAM
Features
* Temperature Ranges -- Commercial : 0C to 70C -- Industrial : -40C to 85C -- Automotive : -40C to 125C * High speed: 55 ns and 70 ns * 70-ns speed bin offered in both Industrial and Automotive grades * Wide voltage range: 2.7V-3.6V * Ultra-low active, standby power * Easy memory expansion with CE and OE features * TTL-compatible inputs and outputs * Automatic power-down when deselected * CMOS for optimum speed/power * Package available in a standard 44-pin TSOP Type II (forward pinout) package This is ideal for providing More Battery LifeTM (MoBL(R)) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A16). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A16). Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the Truth Table at the back of this data sheet for a complete description of read and write modes.
Functional Description[1]
The CY62136V is a high-performance CMOS static RAM organized as 128K words by 16 bits. This device features advanced circuit design to provide ultra-low active current.
Logic Block Diagram
DATA IN DRIVERS A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
ROW DECODER
128K x 16 RAM Array 2048 x 1024
SENSE AMPS
I/O0 - I/O7 I/O8 - I/O15
COLUMN DECODER BHE WE CE OE BLE
A12
A11
A13
Note: 1. For best practice recommendations, please refer to the Cypress application note "System Design Guidelines" on http://www.cypress.com.
Cypress Semiconductor Corporation Document #: 38-05087 Rev. *B
*
3901 North First Street
A14 A15 A16
*
San Jose, CA 95134 * 408-943-2600 Revised September 24, 2004
CY62136V MoBL(R)
Product Portfolio
Power Dissipation (Industrial) VCC Range (V) Product CY62136VLL Min 2.7 Typ.[2] 3.0 Max 3.6 Speed 55 70 CY62136VSL 55 70 Grades Industrial Industrial Automotive Industrial Industrial Operating, ICC (mA) Typ.[2] 7 7 7 7 7 Maximum 20 15 20 20 15 Standby, ISB2 (A) Typ.[2] 1 1 1 1 1 Maximum 15 15 20 5 5
Pin Configurations[3]
TSOP II (Forward) Top View
A4 A3 A2 A1 A0 CE I/O0 I/O1 I/O2 I/O3 VCC VSS I/O4 I/O5 I/O6 I/O7 WE A16 A15 A14 A13 A12
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
A5 A6 A7 OE BHE BLE I/O15 I/O14 I/O13 I/O12 VSS VCC I/O11 I/O10 I/O9 I/O8 NC A8 A9 A10 A11 NC
Notes: 2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC Typ, TA = 25C. 3. NC pins are not connected on the die
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CY62136V MoBL(R)
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature .................................. -65C to +150C Ambient Temperature with Power Applied............................................. -55C to +125C Supply Voltage to Ground Potential ............... -0.5V to +4.6V DC Voltage Applied to Outputs in High-Z State[4] ....................................-0.5V to VCC + 0.5V DC Input Voltage[4] .................................-0.5V to VCC + 0.5V Output Current into Outputs (LOW)............................ 20 mA Static Discharge Voltage........................................... > 2001V (per MIL-STD-883, Method 3015) Latch-up Current..................................................... > 200 mA
Operating Range
Range Industrial Automotive Ambient Temperature[TA][6] -40C to +85C -40C to +125C VCC 2.7V to 3.6V
Electrical Characteristics Over the Operating Range
CY62136V-55 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage IOH = -1.0 mA Test Conditions VCC = 2.7V VCC = 2.7V VCC = 3.6V VCC = 2.7V GND < VI < VCC GND < VO < VCC, Output Disabled f = fMAX = 1/tRC, f = 1 MHz, CE > VCC-0.3V, VIN > VCC-0.3V or VIN < 0.3V, f = fMAX VCC = 3.6V Industrial(LL) CE > VCC-0.3V VIN > VCC-0.3V or Industrial(SL) VIN < 0.3V, f = 0 Automotive 1 1 Industrial Automotive Output Leakage Current VCC Operating Supply Current Automatic CE Power-down Current-- CMOS Inputs Automatic CE Power-down Current-- CMOS Inputs Industrial Automotive VCC = 3.6V, Industrial IOUT = 0 mA, Automotive CMOS Levels 7 1 20 2 100 -1 +1 2.2 -0.5 -1 Min. 2.4 0.4 VCC + 2.2 0.5V 0.8 +1 -0.5 -1 -10 -1 -10 7 7 1 Typ.[2] CY62136V-70 2.4 0.4 VCC+ 0.5V 0.8 +1 +10 +1 +10 15 20 2 100 V V V V A A A A mA mA mA A Max. Min. Typ.[2] Max. Unit
Output LOW Voltage IOL = 2.1 mA Input HIGH Voltage Input LOW Voltage Input Load Current
ISB1
ISB2
15 5
1 1 1
15 5 20
A A A
Thermal Resistance
Parameter JA JC Description Thermal Resistance (Junction to Ambient)[5] Thermal Resistance (Junction to Case)[5] Test Conditions Still Air, soldered on a 4.25 x 1.125 inch, 4-layer printed circuit board TSOPII 60 22 Unit C/W C/W
Capacitance[5]
Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25C, f = 1 MHz, VCC= VCC(typ) Max. 6 8 Unit pF pF
Notes: 4. VIL(min) = -2.0V for pulse durations less than 20 ns. 5. Tested initially and after any design or process changes that may affect these parameters. 6. TA is the "Instant-On" case temperature.
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CY62136V MoBL(R)
AC Test Loads and Waveforms
R1 VCC OUTPUT 30 pF INCLUDING JIG AND SCOPE R2 VCC OUTPUT GND 5 pF INCLUDING JIG AND SCOPE R2 Rise Time: 1 V/ns R1 VCC Typ 10% ALL INPUT PULSES 90% 90% 10% Fall Time: 1 V/ns
(c) (b)
Equivalent to: THEVENIN EQUIVALENT
RTH
(a)
OUTPUT
V
Parameters R1 R2 RTH VTH
3.0V 1105 1550 645 1.75
Unit Ohms Ohms Ohms Volts
Data Retention Characteristics (Over the Operating Range)
Parameter VDR ICCDR Description VCC for Data Retention Data Retention Current VCC = 1.0V, CE > VCC - 0.3V, VIN > VCC LL - 0.3V or VIN < 0.3V, No input may SL exceed VCC + 0.3V 0 70 Conditions[8] Min. 1.0 0.5 Typ.[2] Max. 3.6 7.5 5 ns ns Unit V A
tCDR[5] tR[7]
Chip Deselect to Data Retention Time Operation Recovery Time
Data Retention Waveform
DATA RETENTION MODE VCC
VCC(min.)
tCDR
VDR > 1.0 V
VCC(min.)
tR
CE
Switching Characteristics Over the Operating Range [8]
55 ns Parameter Read Cycle tRC tAA tOHA tACE tDOE tLZOE Read Cycle Time Address to Data Valid Data Hold from Address Change CE LOW to Data Valid OE LOW to Data Valid OE LOW to Low-Z[9] 5 10 55 25 5 55 55 10 70 35 70 70 ns ns ns ns ns ns Description Min. Max. Min. 70 ns Max. Unit
Notes: 7. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 ms or stable at VCC(min) > 100 ms. 8. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to VCC typ., and output loading of the specified IOL/IOH and 30-pF load capacitance. 9. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 10. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in (b) of AC Test Loads. Transition is measured 500 mV from steady-state voltage.
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CY62136V MoBL(R)
Switching Characteristics Over the Operating Range (continued)[8]
55 ns Parameter tHZOE tLZCE tHZCE tPU tPD tDBE tLZBE tHZBE Write Cycle[11, 12] tWC tSCE tAW tHA tSA tPWE tBW tSD tHD tHZWE tLZWE Write Cycle Time CE LOW to Write End Address Set-up to Write End Address Hold from Write End Address Set-up to Write Start WE Pulse Width BLE / BHE LOW to Write End Data Set-up to Write End Data Hold from Write End WE LOW to High-Z[9, 10] WE HIGH to Low-Z[9] 5 55 45 45 0 0 40 50 25 0 20 10 70 60 60 0 0 50 60 30 0 25 ns ns ns ns ns ns ns ns ns ns ns Description OE HIGH to High-Z CE HIGH to High-Z
[9, 10]
70 ns Max. 25 Min. 10 25 25 0 55 25 70 35 5 25 25 Max. 25 Unit ns ns ns ns ns ns ns ns
Min. 10 0
CE LOW to Low-Z[9]
[9, 10]
CE LOW to Power-up CE HIGH to Power-down BLE / BHE LOW to Data Valid BLE / BHE LOW to Low-Z
[9, 10]
5
BLE / BHE HIGH to High-Z[11]
Switching Waveforms
Read Cycle No. 1 [13, 14]
tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID
Notes: 11. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 12. The minimum write cycle time for write cycle 3 (WE controlled, OE LOW) is the sum of tHZWE and tSD. 13. Device is continuously selected. OE, CE = VIL. 14. WE is HIGH for read cycle.
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CY62136V MoBL(R)
Switching Waveforms (continued)
Read Cycle No. 2 [14, 15]
CE tACE OE tDOE BHE/BLE tLZOE tHZBE tDBE tLZBE DATA OUT HIGH IMPEDANCE tLZCE VCC SUPPLY CURRENT tPU 50% 50% ISB ICC DATA VALID HIGH IMPEDANCE tHZOE tRC tPD tHZCE
[11, 16, 17]
Write Cycle No. 1 (WE Controlled)
tWC ADDRESS
CE tAW WE tSA tPWE tHA
BHE/BLE
tBW
OE tSD DATA I/O NOTE 18 tHZOE
Notes: 15. Address valid prior to or coincident with CE transition LOW. 16. Data I/O is high impedance if OE = VIH. 17. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. 18. During this period, the I/Os are in output state and input signals should not be applied.
tHD
DATAIN VALID
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CY62136V MoBL(R)
Switching Waveforms (continued)
Write Cycle No. 2 (CE Controlled)
[11, 16, 17]
tWC ADDRESS CE tSA tAW tHA tSCE
BHE/BLE
tBW
WE
tPWE tSD tHD
DATA I/O
[12, 17]
DATA VALID IN
Write Cycle No. 3 (WE Controlled, OE LOW)
tWC ADDRESS
CE tAW tBW tSA tHA
BHE/BLE WE
tSD DATA I/O NOTE 18 tHZWE DATA VALID IN
tHD
tLZWE
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CY62136V MoBL(R)
Switching Waveforms (continued)
Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)
[18]
tWC ADDRESS
CE tAW tBW tSA WE tSD DATA I/O tHD tHA
BHE/BLE
NOTE 18
tHZWE
DATA VALID IN tLZWE
Typical DC and AC Characteristics
Normalized Operating Current vs. Supply Voltage Standby Current vs. Supply Voltage 35 MoBL 30 25 ISB (A) 20 15 10 5 0 2.2 2.7 3.2 SUPPLY VOLTAGE (V) 3.7 1.0 2.7 2.8 3.7 1.9 SUPPLY VOLTAGE (V)
1.4 1.2
MoBL 1.0 ICC 0.8 0.6 0.4 0.2 0.0 1.7
Access Time vs. Supply Voltage 80 70 60 50 TAA (ns) 40 30 20 10 1.0 1.9 2.7 2.8 3.7 MoBL
SUPPLY VOLTAGE (V)
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CY62136V MoBL(R)
Truth Table
CE H L L L L L L L L L L WE X H H H H H H H L L L OE X L L L L H H H X X X BHE X L H L H L H L L H L BLE X L L H H L L H L L H Inputs/Outputs High-Z Data Out (I/OO-I/O15) Data Out (I/OO-I/O7); I/O8-I/O15 in High-Z Data Out (I/O8-I/O15); I/O0-I/O7 in High-Z High-Z High-Z High-Z High-Z Data In (I/OO-I/O15) Data In (I/OO-I/O7); I/O8-I/O15 in High-Z Data In (I/O8-I/O15); I/O0 -I/O7 in High-Z Read Read Read Deselect/Output Disabled Deselect/Output Disabled Deselect/Output Disabled Deselect/Output Disabled Write Write Write Mode Deselect/Power-down Power Standby (ISB) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC)
Ordering Information
Speed (ns) 55 70 Ordering Code CY62136VLL-55ZSI CY62136VSL-55ZSI CY62136VLL-70ZSI CY62136VLL-70ZSE CY62136VSL-70ZSI Package Name ZS44 44-pin TSOP II Package Type Operating Range Industrial Industrial Industrial Automotive Industrial
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CY62136V MoBL(R)
Package Diagrams
44-pin TSOP II ZS44
51-85087-*A
MoBL is a registered trademark, and More Battery Life is a trademark, of Cypress Semiconductor Corporation. All product and company names mentioned in this document are the products of their respective holders.
Document #: 38-05087 Rev. *B
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(c) Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
CY62136V MoBL(R)
Document History Page
Document Title: CY62136V MoBL(R) 2-Mbit (128K x 16) Static RAM Document Number: 38-05087 REV. ** *A ECN NO. 107347 116509 Issue Date 05/25/01 09/04/02 Orig. of Change SZV GBI Description of Change Changed from Spec #: 38-00728 to 38-05087 Added footnote 1 Added SL power bin Deleted fBGA package; replacement fBGA package available in CY62136CV30 Added Automotive Information for 70-ns Speed Bin. Added Footnotes # 3 and # 6. Corrected Typo in Electrical Characteristics for ICC(Max)-55 ns from 15 to 20 mA. Added SL row for ISB2 in the Electrical Characteristics table. Changed Package Name from Z44 to ZS44. Replaced `Z' with `ZS' in the Ordering Code.
*B
269729
See ECN
SYT
Document #: 38-05087 Rev. *B
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